Electronic devices including integrated circuits (ICs) can be sensitive to various forms of electronic and/or magnetic interference.
Magnetic storage elements are used in various solid state memory applications, such as magnetic random access memory (MRAM) and spin torque random access memory (STRAM). Magnetic elements, however, are sensitive to stray magnetic fields; these magnetic fields may affect the reading and/or writing processes of the elements. Stray magnetic fields are known to range up to 50 Oe for general applications and up to 200 Oe for certain special applications, such near the voice coil motor of a disc drive. To ensure proper operation of the memory, any stray field should to be attenuated to a maximum of 10 Oe in the plane of the memory chip.
One problem with magnetic shielding designs is that there is limited space available in modern semiconductor packages for the magnetic shields. Another problem is cost associated with the shielding. Shielding a 12.5 mm square chip from a 200 Oe field requires a relatively high moment shielding material, such as an Fe—Si electrical steel that saturates at 18,000 gauss, at a thickness of at least 200 μm. For a Ni—Fe alloy that saturates at 12,000 gauss, a thickness of at least 300 μm is required. To reduce assembly cost it would be desirable to plate the shield directly on the top of the integrated circuit chip, but stress, material cost, process time and lack of physical space all make a 200 to 300 μm plated shield commercially impractical.
Other solutions for shielding from stray fields are needed.